1. Field
Exemplary embodiments of the present invention relate to a signal receiver circuit which is used to receive a signal in various integrated circuits.
2. Description of the Related Art
A low-power system such as a mobile memory system uses an interface with a low termination scheme. When a low termination scheme is applied to an interface between integrated circuits, a voltage level of a signal transferred/received between the integrated circuits becomes very low, and thus a signal receiver circuit is required to recognize the transferred signal having the low voltage level.
Signal receiver circuits use strong arm latches. In a general strong arm latch, NMOS transistors are used for sampling input signals. However, in a low-power system using a low termination scheme, the voltage level of the input signals is too low to use NMOS transistors for sampling the input signals. Therefore, instead of the NMOS transistors, PMOS transistors are used to sample the input signals in the low-power system using the low termination scheme.
However, a PMOS transistor generally exhibits lower performance than an NMOS transistor. Thus, when PMOS transistors are used for sampling the input signals, the performance of the strong arm latch is lower than that of the case where NMOS transistors are used for sampling the input signals.